Digital and Microprocessor Lab

Sr No Particular No Available Cost
1 A to D Converter 01 2489

2 7LS90 Decade conuter 01 2489

3 Study of flip flop 01 1957

4 Half substractor , 01 2222
Full substractor

5 R2R Ladder Digital 01 7555

6 Universal ShifRagister 01 1957

7 3-bit synchro counter 01 2489

8 Asynchronous Decade 01 1957
Counter

9 Implementation of 01 1957
combinational
circuit using multiplier

10 74LS155 Dual 2 line to 01 2489
4 line Decode

11 Mod 6 to Mad 20 Counter 01 2489

12 Master Slave JK flip 01 1957
flop

13 Demorgan’s Theorem 01 1957

14 NAND gate as universal 01 1957
gate

15 Binary to Gray & Gray 01 2222
to Binary

16 Half Adder & 01 2222
Full Adder

17 Verify oprerations 01 2489
of 74138

18 NOR as universal gate 01 1957

19 Verify opretionsal 01 2489
of 74154

20 7 Segment Decoder 01 2222

21 D to A Converter 01 2489

Total 52011